Semiconductor memories are commonly used in several applications for storing information, temporarily, in the so-called volatile memories, or permanently, in the so-called non-volatile memories, which are able to preserve the information also in absence of power supply. A non-volatile semiconductor memory comprises a matrix of memory cells, arranged in rows and columns to which there are respectively associated so-called word lines and bit lines. For example, the cells may be floating-gate MOSFETs. Each memory cell has a threshold voltage which may be programmed to different levels, to which respective logic values correspond.
A very common type of memory is the so-called “flash” memory, which, in addition to the non-volatility, offers the possibility of electrically writing and erasing the memory cells. For example, in the bi-level flash memories, wherein each cell is adapted to store one only information bit, in an erased condition the generic memory cell has a relatively low threshold voltage (the logic value 1 is typically associated thereto). The cell is programmed by means of the injection of electrons into the floating gate thereof. In such a condition the memory cell has a higher threshold voltage (the logic value 0 is typically associated thereto). In multi-level flash memories, each memory cell is adapted to store more than one information bit, and it can be programmed in a selected one of a plurality of different states, to which respective values of the threshold voltage correspond. For example, in a memory which operates with four levels (a so-called four-level memory), each memory cell stores a logic value which consists of two information bits (that is, 11, 10, 01 and 00, as the threshold voltage of the memory cell increases).
For retrieving the stored information, the semiconductor memories comprise reading circuitries adapted to read the data stored in the memory cells. In particular, the logic values stored in the selected memory cells are read by comparing a current flowing through each memory cell with the currents provided by one or more reference cells, programmed in a predetermined condition. For this purpose, the reading circuitry also applies a suitable biasing voltage to the selected memory cells and the reference cells. The comparison operation between the currents flowing respectively through the selected memory cell and the reference cells is typically performed by sense amplifiers, included in the reading circuitry and adapted to provide an indication of the stored logic value depending on the output voltage thereof.
Typically, the sense amplifiers used in the semiconductor memories provide for the use of differential amplifiers adapted to control and stabilize the voltage of a bit line to which the selected memory cell is connected during the reading operations. The Applicant has observed that the use of differential amplifiers implies high current absorptions during the conventional operations (such as the reading) performed on the memory device.
The problem becomes more noticeable as the number of sense amplifiers which have to be integrated in the memory increases. For example, in the case of flash memories, wherein distinct individually-erasable memory sectors are often provided for, the sectors being grouped to form so-called memory partitions, each one comprising a predetermined number of sectors (for example, 16 sectors), for each memory partition a plurality of sense amplifiers has to be provided (for example, 128 sense amplifiers in the case in which for each sector one desires to read sixteen words at the same time, each comprising 8 memory cells). In general, as the partitioning of the memory increases, the number of sense amplifiers increases, and thus the current consumption becomes significant.
In other words, the current consumption of the reading circuitry is more and more a limiting aspect in semiconductor memories which require a high number of sense amplifiers during the reading operations, thus contrasting the increasing requirement of optimizing the data storage capacity to power dissipation ratio.
Moreover, the differential amplifiers have the drawback of occupying a significant area of the semiconductor material chip wherein the memory is integrated.
Also in this case, the problem becomes more noticeable as the number of the sense amplifiers which have to be integrated in the memory increases.